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general description the max5927/max5929 +1v to +13.2v quad hot-swapcontrollers provide complete protection for multisupply systems. they allow the safe insertion and removal of cir- cuit cards into live backplanes. these devices hot swap multiple supplies ranging from +1v to +13.2v, provided one supply is at or above +2.7v and only one supply is above +11.0v. the input voltage rails (channels) can be configured to sequentially turn-on/off, track each other, or have completely independent operation. the discharged filter capacitors of the circuit card pro- vide low impedance to the live backplane. high inrush currents from the backplane to the circuit card can burn up connectors and components, or momentarily collapse the backplane power supply leading to a system reset. the max5927/max5929 hot-swap controllers prevent such problems by gradually ramping up the output volt- age and regulating the current to a preset limit when the board is plugged in, allowing the system to stabilize safely. after the startup cycle is complete, on-chip com- parators provide variablespeed/bilevel? protection against short-circuit and overcurrent faults, and provide immunity against system noise and load transients. the load is disconnected in the event of a fault condition. the max5929a automatically restarts after a fault condition, while the max5929l must be unlatched. the max5927 fault management mode is selectable. the max5927/max5929 offer a variety of options to reduce external component count and design time. all devices integrate an on-board charge pump to drive the gates of low-cost external n-channel mosfets, an adjustable startup timer, and an adjustable current limit. the devices offer integrated features like startup cur- rent regulation and current glitch protection to eliminate external timing resistors and capacitors. the max5929_l provides an open-drain active-low status output for each channel, the max5929_h provides an open-drain active-high status output for each channel, and the max5927 status output polarity is selectable. the max5927 is available in a 32-pin thin qfn package and the max5929 is available in a 24-pin qsop pack- age. all devices are specified over the extended tem- perature range, -40c to +85c. applications features ? safe hot swap for +1v to +13.2v power supplieswith any input voltage (v in_ 2.7v and only one v in_ > 11.0v) ? adjustable circuit breaker/current-limitthreshold from 25mv to 100mv ? configurable tracking, sequencing, orindependent operation modes ? variablespeed/bilevel circuit-breaker response ? internal charge pumps generate n-channelmosfet gate drives ? inrush current regulated at startup ? autoretry or latched fault management ? programmable undervoltage lockout ? status outputs indicate fault/safe condition max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ________________________________________________________________ maxim integrated products 1 3231 30 29 28 27 26 lim1on1 on2 pol mode on3 on4 25 lim2 9 1011 12 13 14 15 stat2 tim n.c. latch stat3 stat4 bias 16 gnd 17 18 19 20 21 22 23 gate3 sense3 in3 n.c. lim3 gate2 sense2 8 7 6 5 4 3 2 stat1 gate4 sense4 in4 lim4 gate1 sense1 max5927 thin qfn 1 in1 24 in2 top view pin configurations ordering information 19-2945; rev 3; 3/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. evaluation kit available part temp range pin-package max5927 etj -40c to +85c 32 thin qfn-ep max5929 lheeg -40c to +85c 24 qsop max5929lleeg -40c to +85c 24 qsop max5929aheeg -40c to +85c 24 qsop max5929aleeg -40c to +85c 24 qsop variablespeed/bilevel is a trademark of maxim integratedproducts, inc. pci express hot plughot plug-in daughter cards raid power-supply sequencing/tracking basestation line cardsportable computer device bays (docking stations) network switches, routers, hubs selector guide and typical operating circuit appear at endof data sheet. ep = exposed paddle. pin configurations continued at end of data sheet. downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd, unless otherwise noted.) in_ ..........................................................................-0.3v to +14v gate_.............................................................-0.3v to (in_ + 6v) bias (note 1) .............................................. (v in - 0.3v) to +14v on_, stat_, lim_ (max5927), tim, mode, latch (max5927), pol (max5927) (note 1) .....................................................-0.3v to (v in + 0.3v) sense_........................................................-0.3v to (in_ + 0.3v) current into any pin..........................................................50ma continuous power dissipation (t a = +70c) 24-pin qsop (derate 9.5mw/c above +70c)............762mw 32-pin thin qfn (derate 21.3mw/c above +70c) ..1702mw operating temperature range ...........................-40c to +85c junction temperature .....................................................+150c storage temperature range .............................-65c to +150c lead temperature (soldering, 10s) .................................+300c electrical characteristics(v in_ = +1v to +13.2v provided at least one supply is larger than or equal to +2.7v and only one supply is > +11.0v, t a = -40c to +85c, unless otherwise noted. typical values are at v in1 = 12.0v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, v on_ = +3.3v, and t a = +25c.) (notes 1, 2) parameter symbol conditions min typ max units power supplies in_ input voltage range v in_ at least one v in_ +2.7v and only one v in_ > +11.0v 1.0 13.2 v supply current i q i in1 + i in2 + i in3 + i in4 , v on_ = 2.7v, v in_ = +13.2v, after stat_ asserts 2.5 5 ma current control t a = +25c 22.5 25 27.5 lim_ = gnd,max5927/max5929 (note 4) t a = -40c to +85c 21.0 27.5 r lim_ = 10k (max5927) 80 125 slow-comparator threshold(v in_ - v sense_ ) (note 3) v sc,th r lim_ from lim_ to gnd (max5927) r lim_ x 7.5 x 10 -6 + 25mv mv 1mv overdrive 3 ms slow-comparator response time(note 4) t scd 50mv overdrive 130 s fast-comparator threshold(v in_ - v sense_ ) v fc,th 2 x v sc , th mv fast-comparator response time t fcd 10mv overdrive, from overload condition 200 ns sense_ input bias current i b sense_ v sense_ = v in_ 0.03 1 a mosfet driver r tim = 100k 8.0 10.8 13.6 r tim = 4k (minimum value) 0.30 0.4 0.55 startup period (note 5) t start tim floating (default) 5 9 14 ms note 1: v in is the largest of v in1 , v in2 , v in3 , and v in4 . downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers _______________________________________________________________________________________ 3 electrical characteristics (continued)(v in_ = +1v to +13.2v provided at least one supply is larger than or equal to +2.7v and only one supply is > +11.0v, t a = -40c to +85c, unless otherwise noted. typical values are at v in1 = 12.0v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, v on_ = +3.3v, and t a = +25c.) (notes 1, 2) parameter symbol conditions min typ max units charging, v gate_ = gnd, v in_ = 5v (note 6) 80 100 125 discharging, during startup 100 a discharging, normal turn-off or triggered bythe slow comparator after startup, v gate_ = 5v, v in_ = 10v, v on_ = 0v 237 average gate current i gate discharging, triggered by a fault afterstartup, v gate_ = 5v, v in_ = 10v, (v in_ - v sense_ ) > v fc,th (note 7) 30 50 120 ma gate-drive voltage v drive v gate_ - v in_ , i gate_ = 1a 4.9 5.3 5.6 v on comparator low to high 0.85 0.875 0.90 v on_ threshold v on_ , th hysteresis 25 mv on_ propagation delay 10mv overdrive 10 s on_ voltage range v on_ without false output inversion v in v on_ input bias current i bon_ v on_ = v in 0.03 1 a on_ pulse width low t unlatch to unlatch after a latched fault 100 s digital outputs (stat_) output leakage current v stat_ 13.2v 1 a output voltage low v ol_ pol = floating (max5927), i sink = 1ma 0.4 v undervoltage lockout (uvlo) uvlo threshold v uvlo startup is initiated when this threshold isreached by any v in_ and v on_ > 0.9v (note 8) 2.25 2.65 v uvlo hysteresis v uvlo , hyst 250 mv uvlo glitch filter reset time t d, gf v in < v uvlo maximum pulse width to reset 10 s uvlo to startup delay t d,uvlo time input voltage must exceed v uvlo before startup is initiated 20 37.5 60 ms input power-ready threshold v pwrrdy (note 9) 0.9 0.95 1.0 v input power-ready hysteresis v pwrhyst 50 mv logic and timing pol input pullup i pol pol = gnd (max5927) 2 4 6 a latch input pullup i latch latch = gnd (max5927) 2 4 6 a mode input voltage v mode mode floating (default to sequencingmode) 1.0 1.25 1.5 v independent mode selectionthreshold v indep , th v mode rising 0.4 v tracking mode selectionthreshold v track , th v mode rising 2.7 v downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 4 _______________________________________________________________________________________ electrical characteristics (continued)(v in_ = +1v to +13.2v provided at least one supply is larger than or equal to +2.7v and only one supply is > +11.0v, t a = -40c to +85c, unless otherwise noted. typical values are at v in1 = 12.0v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, v on_ = +3.3v, and t a = +25c.) (notes 1, 2) parameter symbol conditions min typ max units mode input impedance r mode 200 k autoretry delay t retry delay time to restart after fault shutdown 64 x t start ms note 2: all devices are 100% tested at t a = +25c. limits over temperature are guaranteed by design. note 3: the slow-comparator threshold is adjustable. v sc,th = r lim x 7.5a + 25mv (see the typical operating characteristics ). note 4: the current-limit slow-comparator response time is weighed against the amount of overcurrentthe higher the overcurrentcondition, the faster the response time (see the typical operating characteristics ). note 5: the startup period (t start ) is the time during which the slow comparator is ignored and the device acts as a current limiter by regulating the sense current with the fast comparator (see the startup period section). note 6: the current available at gate is a function of v gate (see the typical operating characteristics ). note 7: after a fault triggered by the fast comparator, the gate is discharged by the strong discharge current. note 8: each channel input while the other inputs are at +1v. note 9: each channel input while any other input is at +3.3v. t ypical operating characteristics (typical operating circuits, q1 = q2 = q3 = q4 = fairchild fdb7090l, v in1 = 12v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, t a = +25c, unless otherwise noted. channels 1 through 4 are identical in performance. where characteristics are interchangeable,channels 1 through 4 are referred to as w, x, y, and z.) 0 1 2 3 4 supply current vs. input voltage max5927 toc01 v inw (v) i in (ma) 06 8 24 10 12 14 v inx = v iny = v inz = 2.7v i inw + i inx + i iny + i inz i inw i inx + i iny + i inz 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 26 48 1 0 12 14 total supply current vs. input voltage max5927 toc02 v in (v) i in (ma) i in = i in1 + i in2 + i in3 + i in4 v in = v inw = v inx = v iny = v inz v on = v on1 = v on2 = v on3 = v on4 v on = 0v v on = 3.3v 0 1.00.5 2.01.5 2.5 3.0 -40 85 supply current vs. temperature max5927 toc03 temperature ( c) i in (ma) 10 -15 35 60 v on_ = v inx = v iny = v inz = 2.7v v inw = 2.8v i inw + i inx + i iny + i inz i inx + i iny + i inz i inw downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers _______________________________________________________________________________________ 5 0 2 4 6 8 gate-drive voltage vs. input voltage max5927 toc04 v inw (v) v drivew (v) 06 8 24 10 12 14 v inx = v iny = v inz = 2.7v 0 30 9060 120 150 gate charge current vs. gate voltage max5927 toc05 v gatew (v) gate charge current ( a) 01 0 51 5 2 0 v onw = v inx = v iny = v inz = 2.7v v inw = 1v v inw = 5v v inw = 13.2v 0 40 120 80 160 200 gate charge current vs. temperature max5927 toc06 temperature ( c) gate charge current ( a) -40 35 10 -15 60 85 v onw = v inx = v iny = v inz = 2.7v v gatew = 0v v inw = 13.2v v inw = 5v 0 21 43 5 6 02 0 gate discharge current (normal) vs. gate voltage max5927 toc07 v gatew (v) gate discharge current (ma) 8 41 2 1 6 v onw = 0v v inx = v iny = v inz = 2.7v v inw = 13.2v v inw = 1v v inw = 5v v inw = 3.3v 0 21 43 5 6 -40 85 gate discharge current (normal) vs. temperature max5927 toc08 temperature ( c) gate discharge current (ma) 10 -15 35 60 v onw = 0v v inx = v iny = v inz = 2.7v v inw = 13.2v v inw = 5v v inw = 3.3v v inw = 1v 10 02 55 07 5 100 125 1 0.1 0.01 0.001 0.0001 turn-off time vs. sense voltage max5927 toc09 v inw - v sensew (mv) turn-off time (ms) slow-comparatorthreshold fast-comparatorthreshold turn-off time vs. sense voltage (expanded scale) max5927 toc10 v inw - v sensew (mv) turn-off time (ms) 10 0.1 1 20 25 30 35 40 45 50 slow-comparator threshold 0 20 6040 100 80 120 slow-comparator threshold vs. r limw max5927 toc11 r limw (k ? ) v sc,th (mv) 0 2 4 6 8 10 0 20 40 60 startup period vs. r tim max5927 toc12 r tim (k ? ) t start (ms) 0 100 200 400 300 500 t ypical operating characteristics (continued) (typical operating circuits, q1 = q2 = q3 = q4 = fairchild fdb7090l, v in1 = 12v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, t a = +25c, unless otherwise noted. channels 1 through 4 are identical in performance. where characteristics are interchangeable,channels 1 through 4 are referred to as w, x, y, and z.) downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 6 _______________________________________________________________________________________ turn-off time slow-comparator fault max5927toc13 v statw 2v/div v gatew 5v/div v inw - v sensew 25mv/div 0v0v 1ms/div turn-off time fast-comparator fault max5927toc14 v statw 2v/div v gatew 5v/div v inw - v sensew 100mv/div 0v 0v0v 100ns/div startup waveforms fast turn-on (c gate = 0nf, c board = 1000 f) max5927toc15 v onw 5v/div v gatew 10v/div v statw 5v/div i inw 2a/div v outw 10v/div 2ms/div startup waveforms slow turn-on (c gate = 0.22 f, c board = 1000 f) max5927toc16 v onw 5v/div v gatew 10v/div v statw 5v/div i inw 2a/div v outw 10v/div 10ms/div autoretry delay (time floating) max5927toc17 v gatew 2v/div 0v0v 0v v outw 2v/div i outw 500ma/div 100ms/div turn-on in voltage-tracking mode max5927toc18 v inw 2v/div 0v0v v onw 2v/div5v/div 4ms/div v pwrrdy v gatex v gatew t ypical operating characteristics (continued) (typical operating circuits, q1 = q2 = q3 = q4 = fairchild fdb7090l, v in1 = 12v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, t a = +25c, unless otherwise noted. channels 1 through 4 are identical in performance. where characteristics are interchangeable,channels 1 through 4 are referred to as w, x, y, and z.) downloaded from: http:///
xxxx max5927toc19 v inw 2v/div 0v v onw 2v/div 0v 5v/div 0v 4ms/div v gatex v gatew v pwrrdy turn-off in voltage-tracking mode xxxx max5927toc20 v inw 2v/div v onw 2v/div 0v 5v/div 4ms/div v gatex v gatew turn-on in power-sequencing mode v pwrrdy 0v0v xxxx max5927toc21 v inw 2v/div v onw 2v/div5v/div 0v 0v0v 4ms/div v gatex v gatew turn-off in power-sequencing mode v pwrrdy max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers _______________________________________________________________________________________ 7 xxxx max5927toc22 v inw 2v/div 0v v onw 2v/div 0v 5v/div 0v 4ms/div turn-on in independent mode v gatex v gatew xxxx max5927toc23 v inw 2v/div 0v v onw 2v/div5v/div 0v 4ms/div turn-off in independent mode v pwrrdy v gatex v gatew 0v 0 10 3020 40 50 strong gate discharge current vs. overdrive max5927 toc24 v in_ - v sense_ (mv) gate discharge current (ma) 20 35 25 30 45 40 50 v inw = 5v v inw = 2.7v v onw = v in v gate = 5v after startup v inw = 12v t ypical operating characteristics (continued) (typical operating circuits, q1 = q2 = q3 = q4 = fairchild fdb7090l, v in1 = 12v, v in2 = 5.0v, v in3 = 3.3v, v in4 = 1.0v, t a = +25c, unless otherwise noted. channels 1 through 4 are identical in performance. where characteristics are interchangeable,channels 1 through 4 are referred to as w, x, y, and z.) downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 8 _______________________________________________________________________________________ pin description pin max5927 max5929 name function 14 in1 channel 1 supply input. connect to a supply voltage from 1v to 13.2v and to one end ofr sense1 . bypass with a 0.1f capacitor to ground. 25 sense1 channel 1 current-sense input. connect sense1 to the drain of an external mosfetand to one end of r sense1 . 36 gate1 channel 1 gate-drive output. connect to gate of external n-channel mosfet. 4 lim4 channel 4 current-limit setting. connect a resistor from lim4 to gnd to set current-triplevel. connect to gnd for the default 25mv threshold. do not leave open. 57 in4 channel 4 supply input. connect to a supply voltage from 1v to 13.2v and to one end ofr sense4 . bypass with a 0.1f capacitor to ground. 68 sense4 channel 4 current-sense input. connect sense4 to the drain of an external mosfetand to one end of r sense4 . 79 gate4 channel 4 gate-drive output. connect to gate of external n-channel mosfet. 81 0 stat1 open-drain status signal for channel 1. stat1 asserts when hot swap is successful andt start has elapsed. stat1 deasserts if on1 is low, or if channel 1 is turned off for any fault condition. 91 1 stat2 open-drain status signal for channel 2. stat2 asserts when hot swap is successful andt start has elapsed. stat2 deasserts if on2 is low, or if channel 2 is turned off for any fault condition. 10 12 tim startup timer setting. connect a resistor from tim to gnd to set the startup period.leave tim unconnected for the default startup period of 9ms. r tim must be between 4k and 500k . 11, 20 n.c. no connection. not internally connected. 12 latch latch/autoretry selection input. connect latch to gnd for autoretry mode after a fault. leave latch open for latch mode. 13 13 stat3 open-drain status signal for channel 3. stat3 asserts when hot swap is successful andt start has elapsed. stat3 deasserts if on3 is low, or if channel 3 is turned off for any fault condition. 14 14 stat4 open-drain status signal for channel 4. stat4 asserts when hot swap is successful andt start has elapsed. stat4 deasserts if on4 is low, or if channel 4 is turned off for any fault condition. 15 15 bias supply reference output. the highest supply is available at bias for filtering. connect a1nf to 10nf ceramic capacitor from bias to gnd. no other connections are allowed to this pin. 16 16 gnd ground 17 17 gate3 channel 3 gate-drive output. connect to gate of external n-channel mosfet. 18 18 sense3 channel 3 current-sense input. connect sense3 to the drain of an external mosfetand to one end of r sense3 . 19 19 in3 channel 3 supply input. connect to a supply voltage from 1v to 13.2v and to one end ofr sense3 . downloaded from: http:///
detailed description the max5927/max5929 are circuit-breaker ics for hot-swap applications where a line card is inserted into a live backplane. the max5927/max5929 operate down to 1v provided one of the inputs is above 2.7v. normally, when a line card is plugged in to a live back- plane, the cards discharged filter capacitors provide low impedance that can momentarily cause the main power supply to collapse. the max5927/max5929 reside either on the backplane or on the removable card to provide inrush current limiting and short-circuit protection. this is achieved by using external n-chan- nel mosfets, external current-sense resistors, and on- chip comparators. the startup period and current-limit threshold of the max5927/max5929 can be adjusted with external resistors. figure 1 shows the max5927/ max5929 functional diagram. the max5927 offers four programmable current limits, selectable fault management mode, and selectable stat_ output polarity. the max5929 features fixed cur- rent limits, and a variety of fault management and stat_ polarity option combinations. mode the max5927/max5929 supports three modes of oper- ation: voltage-tracking, power-sequencing, and inde- pendent mode. select the appropriate mode according to table 1. voltage-tracking mode connect mode high to enter voltage-tracking mode.while in voltage-tracking mode, all channels turn on and off together. to turn all channels on: ? at least one v in_ must exceed v uvlo (2.45v) for the uvlo to startup delay (37.5ms). ? all v in_ must exceed v pwrrdy (0.95v). ? all v on_ must exceed v on,th (0.875v). ? no faults may be present on any channel. max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers _______________________________________________________________________________________ 9 mode operation high (connect to bias) voltage tracking open power sequencing gnd independent table 1. operational mode selection pin max5927 max5929 name function 21 lim3 channel 3 current-limit setting. connect a resistor from lim3 to gnd to set current-triplevel. connect to gnd for the default 25mv threshold. do not leave open. 22 20 gate2 channel 2 gate-drive output. connect to gate of external n-channel mosfet. 23 21 sense2 channel 2 current-sense input. connect sense2 to the drain of an external mosfetand to one end of r sense2 . 24 22 in2 channel 2 supply input. connect to a supply voltage from 1v to 13.2v and to one end ofr sense2 . 25 lim2 channel 2 current-limit setting. connect a resistor from lim2 to gnd to set the current-trip level. connect to gnd for the default 25mv threshold. do not leave open. 26 23 on4 on/off channel 4 control input (see the mode section) 27 24 on3 on/off channel 3 control input (see the mode section) 28 1 mode mode configuration input. mode is configured according to table 1 as soon as one ofthe in_ voltages exceeds uvlo and before turning on out_ (see the mode section). 29 pol stat output polarity select (see table 3 and the status output section) 30 2 on2 on/off channel 2 control input (see the mode section) 31 3 on1 on/off channel 1 control input (see the mode section) 32 lim1 channel 1 current-limit setting. connect a resistor from lim1 to gnd to set the current-trip level. connect to gnd for the default 25mv threshold. do not leave open. ep ep exposed pad. leave ep floating or connect to gnd. pin description (continued) downloaded from: http:///
max5927/max5929 the max5927/max5929 turn off all channels if any ofthe above conditions are not met. after a fault-latched shutdown, cycle any of the on_ inputs to unlatch and restart all channels. power-sequencing mode leave mode floating to enter power-sequencingmode. while in power-sequencing mode, the max5927/max5929 turn on and off each channel depending on the state of the corresponding v on_ . to turn on a given channel:? at least one v in_ must exceed v uvlo (2.45v) for the uvlo to startup delay (37.5ms). ? all v in_ must exceed v pwrrdy (0.95v). ? the corresponding v on_ must exceed v on,th (0.875v). ? no faults may be present on any channel. low-voltage, quad, hot-swap controllers/power sequencers 10 ______________________________________________________________________________________ fast comp. slow comp. fast discharge q1 out1 2.45v bias and references startup oscillator timing oscillator charge pump device control logic v sc, th v fc, th r lim1 sense1 in1 gate1 r sense1 lim1* r tim tim 1nf bias pol* r lim2 100 a uvlo uvlo fast comp. slow comp. fast discharge slow discharge slow discharge q2 out2 charge pump current control and startup logic current control and startup logic v sc, th v fs, th sense2 in2 gate2 r sense2 lim2* 100 a s tat2 s tat1 lim3* lim4* fast comp. slow comp. fast discharge q3 out3 fault management operation mode charge pump on input conparators v sc, th v fs, th sense3 in3 gate3 r sense3 r lim3 r lim4 100 a uvlo uvlo fast comp. slow comp. fast discharge slow discharge slow discharge q4 out4 charge pump current control and startup logic current control and startup logic v sc, th v fs, th sense4 in4 gate4 r sense4 100 a 3ma/50ma 3ma/50ma 3ma/50ma 3ma/50ma s tat4 s tat3 *max5927 only. latch* mode on1 on2 on3 on4 max5927max5929 figure 1. functional diagram downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________ 11 on1on2 on3 on4 anyin_ in2 in3 in4 out1* out2* out3*out4* v uvlo (2.45v) v pwrrdy (0.95v) v pwrrdy (0.95v) v pwrrdy (0.95v) v pwrrdy (0.95v) *the out_ discharge rate is a result of natural decay of the load resistance and capacitance. figure 2. voltage-tracking timing diagram (provided t d, uvlo requirement is met) downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 12 ______________________________________________________________________________________ on1 on2on3 on4 any in_ in2 in3 in4 out1 out2 out3 out4 v uvlo (2.45v) v pwrrdy (0.95v) v pwrrdy (0.95v) v pwrrdy (0.95v) v pwrrdy (0.95v) *the out_ discharge rate is a result of natural decay of the load resistance and capacitance. * * * * figure 3. power-sequencing timing diagram (provided t d, uvlo requirement is met) downloaded from: http:///
the max5927/max5929 turn off all channels if any ofthe above conditions are not met. after a fault-latched shutdown, cycle any of the on_ inputs to unlatch and restart all channels, depending on the corresponding v on_ state. independent mode connect mode to gnd to enter independent mode.while in independent mode, the max5927/max5929 provide complete independent control for each chan- nel. to turn on a given channel: ? at least one v in_ must exceed v uvlo (2.45v) for the uvlo to startup delay (37.5ms) ? the corresponding v in_ must exceed v pwrrdy (0.95v) ? the corresponding v on_ must exceed v on,th (0.875v) the max5927/max5929 turn off the correspondingchannel if any of the above conditions are not met. during a fault condition on a given channel only, the affected channel is disabled. after a fault-latched shut- down, recycle the corresponding on_ inputs to unlatch and restart only the corresponding channel. startup period r tim sets the duration of the startup period from 0.4ms (r tim = 4k ? ) to 50ms (r tim = 500k ? ) (see the setting the startup period, r tim section). the default startup period is fixed at 9ms when tim is floating. the startupperiod begins after the turn-on conditions are met as described in the mode section, and the device is not latched or in its autoretry delay (see the latched and autoretry fault management section). the max5927/max5929 limit the load current if an overcurrent fault occurs during startup instead of com- pletely turning off the external mosfets. the slow comparator is disabled during the startup period and the load current can be limited in two ways: 1) slowly enhancing the mosfets by limiting the mosfet gate-charging current. 2) limiting the voltage across the external current-sense resistor. during the startup period, the gate-drive current is limit- ed to 100a and decreases with the increase of the gate voltage (see the typical operating characteristics ). this allows the controller to slowly enhance the mosfets. if the fast comparator detects an overcur- rent, the max5927/max5929 regulate the gate voltage to ensure that the voltage across the sense resistor does not exceed v su,th . this effectively regulates the inrush current during startup.figure 6 shows the startup waveforms. stat_ is assert- ed immediately after the startup period if no fault condi- tion is present. variablespeed/bilevel fault protection variablespeed/bilevel fault protection incorporatescomparators with different thresholds and response times to monitor the load current (figure 7). during the startup period, protection is provided by limiting the load current. protection is provided in normal operation (after the startup period has expired) by discharging the mosfet gates with a 3ma/50ma pulldown current in response to a fault condition. after a fault, stat_ is deasserted, the max5929l stays latched off and the max5929a automatically restart. use the max5927 latch input to control whether the stat_ outputs latch off or autoretry after a fault condition (see the latched and autoretry fault management section). max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________________________ 13 figure 4. power-sequencing fault turn-off on1 = on2 = on3 = on4overcurrent fault condition out1out2 out3 out4 *the out_ discharge rate is a result of natural decay of the load resistance and capacitance. * * * * downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 14 ______________________________________________________________________________________ on1 on2 on3 on4 in1in2 in3in4 out1out2 out3 out4 v uvlo (2.45v) v pwrrdy (0.95v) v pwrrdy (0.95v) v pwrrdy (0.95v) v pwrrdy (0.95v) * the out_ discharge rate is a result of natural decay of the load resistance and capacitance. t d, uvlo * * * * figure 5. independent mode timing diagram downloaded from: http:///
slow-comparator startup period the slow comparator is disabled during the startupperiod while the external mosfets are turning on. disabling the slow comparator allows the device to ignore the higher-than-normal inrush current charging the board capacitors when a card is first plugged into a live backplane. slow-comparator normal operation after the startup period is complete, the slow comparatoris enabled and the device enters normal operation. the comparator threshold voltage (v sc,th ) is adjustable from 25mv to 100mv. the slow-comparator response time is3ms for a 1mv overdrive. the response time decreases to 100s with a large overdrive. the variable-speed response time allows the max5927/max5929 to ignore low-amplitude momentary glitches, thus increasing system noise immunity. after an extended overcurrent condition, a fault is generated, stat_ outputs are deasserted, and the mosfet gates are discharged with a 3ma pulldown current. fast-comparator startup period during the startup period, the fast comparator regu- lates the gate voltages to ensure that the voltage across the sense resistor does not exceed the startupfast-comparator threshold voltage (v su,th ), v su,th is scaled to two times the slow-comparator threshold(v sc,th ). fast-comparator normal operation in normal operation, if the load current reaches the fast-comparator threshold, a fault is generated, stat_ is deasserted, and the mosfet gates are discharged with a strong 50ma pulldown current. this happens in the event of a serious current overload or a dead short. the fast-comparator threshold voltage (v fc,th ) is scaled to two times the slow-comparator threshold(v sc,th ). this comparator has a fast response time of 200ns (figure 7). undervoltage lockout (uvlo) the uvlo prevents the max5927/max5929 from turn-ing on the external mosfets until one input voltage exceeds the uvlo threshold (2.45v) for t d,uvlo . the max5927/max5929 use power from the highest inputvoltage rail for the charge pumps. this allows for more efficient charge-pump operation. the highest v in_ is provided as an output at bias. the uvlo protects the external mosfets from an insufficient gate-drive volt- max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________ 15 figure 6. independent mode startup waveforms t on v drive v gate_ v gate_ on_s tat_ v th v out_ v out_ i load_ t start c board_ = large c board_ = 0 v fc,th r sense_ figure 7. variablespeed/bilevel response sense voltage (v in - v sense ) turn-off time v sc,th v fc,th (2 x v sc,th ) 3ms 130 s 200ns slow comparator fast comparator downloaded from: http:///
max5927/max5929 age. t d,uvlo ensures that the board is fully inserted into the backplane and that the input voltages are stable. the max5927/max5929 include a uvlo glitch filter, t d,gf , to reject all input voltage noise and tran- sients. bringing all input supplies below the uvlothreshold for longer than t d,gf reinitiates t d,uvlo and the startup period, t start . see figure 8 for an example of automatic turn-on function. latched and autoretry fault management the max5929l always latch the external mosfets offwhen an overcurrent fault is detected, and the max5929a are always in autoretry mode. the max5927 can be configured to either latch the external mosfets off or to autoretry (see table 2). toggling on_ below 0.875v for at least 100s clears the max5929l or max5927 (latch = float) fault and reinitiates the startup period. similarly, the max5929a or max5927 (latch = gnd) turn the external mosfets off when an overcurrent fault is detected, then automatically restart after the autoretry delay that is internally set to 64 times t start . status outputs (stat_) the status (stat_) outputs are open-drain outputs thatassert when hot swap is successful and t start has elapsed. stat_ deasserts if on_ is low or if the chan-nel is turned off for any fault condition. the polarity of the stat_ outputs is selected using pol for the max5927 (see table 3). tables 4 and 5 contain the max5927/max5929 truth tables. applications information component selection n-channel mosfets select the external mosfets according to the applica- tions current levels. table 6 lists recommended com- ponents. the mosfets on-resistance (r ds(on) ) should be chosen low enough to have a minimum volt-age drop at full load to limit the mosfet power dissi- pation. high r ds(on) causes output ripple if there is a pulsating load. determine the device power rating toaccommodate a short-circuit condition on the board at startup and when the device is in autoretry mode (see the mosfet thermal considerations section). using these devices in latched mode allows the use ofmosfets with lower power ratings. a mosfet typical- ly withstands single-shot pulses with higher dissipation than the specified package rating. table 7 lists some recommended mosfet manufacturers. low-voltage, quad, hot-swap controllers/power sequencers 16 ______________________________________________________________________________________ latch fault management floating fault condition latches mosfets off low autoretry mode table 2. selecting fault managementmode (max5927) pol stat_ low asserts low floating asserts high (open drain) table 3. selecting stat_ polarity(max5927) figure 8. automatic turn-on when input voltages are abovetheir respective undervoltage lockout threshold (provided t d , uvlo requirement is met) max5927max5929 v 1 on1on2 on3 on4 gnd gnd on1on2 on3 on4 removable card backplane v 2 v 3 v 4 downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________ 17 part channel 1 fault channel 2 fault channel 3 fault channel 4 fault stat1/ gate1* stat2/ gate2* stat3/ gate3* stat4/ gate4* yes x x x l/off l/off l/off l/off x yes x x l/off l/off l/off l/off xx yes x l/off l/off l/off l/off xxx yes l/off l/off l/off l/off max5927 (pol = 1),max5929_h no no no no h/on h/on h/on h/on yes x x x h/off h/off h/off h/off x yes x x h/off h/off h/off h/off xx yes x h/off h/off h/off h/off xxx yes h/off h/off h/off h/off max5927 (pol = 0),max5929_l no no no no l/on l/on l/on l/on table 4. status output truth table: voltage-tracking and power-sequencing modes (note: stat_ is asserted when hot swap is successful and t on has elapsed. stat_ is unasserted during a fault) channel 1 fault channel 2 fault channel 3 fault channel 4 fault stat1/ gate1 stat2/ gate2 stat3/ gate3 stat4/ gate4 yes yes yes yes unasserted/off unasserted/off unasserted/off unasserted/off yes yes yes no unasserted/off unasserted/off unasserted/off asserted/on yes yes no yes unasserted/off unasserted/off asserted/on unasserted/off yes yes no no unasserted/off unasserted/off asserted/on asserted/on yes no yes yes unasserted/off asserted/on unasserted/off unasserted/off yes no yes no unasserted/off asserted/on unasserted/off asserted/on yes no no yes unasserted/off asserted/on asserted/on unasserted/off yes no no no unasserted/off asserted/on asserted/on asserted/on no yes yes yes asserted/on unasserted/off unasserted/off unasserted/off no yes yes no asserted/on unasserted/off unasserted/off asserted/on no yes no yes asserted/on unasserted/off asserted/on unasserted/off no yes no no asserted/on unasserted/off asserted/on asserted/on no no yes yes asserted/on asserted/on unasserted/off unasserted/off no no yes no asserted/on asserted/on unasserted/off asserted/on no no no yes asserted/on asserted/on asserted/on unasserted/off no no no no asserted/on asserted/on asserted/on asserted/on table 5. status output truth table: independent mode * l = low, h = high. downloaded from: http:///
max5927/max5929 sense resistor the slow-comparator threshold voltage is adjustablefrom 25mv to 100mv. select a sense resistor that caus- es a drop equal to the slow-comparator threshold volt- age at a current level above the maximum normal operating current. typically, set the overload current at 1.2 to 1.5 times the full load current. the fast-compara- tor threshold is two times the slow-comparator thresh- old in normal operating mode. choose the sense resistor power rating to be greater than or equal to 2 x (i overload ) x v sc,th . table 7 lists some recommend- ed sense resistor manufacturers. slow-comparator threshold, r lim (max5927) the slow-comparator threshold voltage is adjustablefrom 25mv to 100mv, allowing designers to fine-tune the current-limit threshold for use with standard-value sense resistors. low slow-comparator thresholds allow for increased efficiency by reducing the power dissi- pated by the sense resistor. furthermore, the low 25mv slow-comparator threshold is beneficial when operating with supply rails down to 1v because it allows a small percentage of the overall output voltage to be used for current sensing. the variablespeed/bilevel fault pro- tection feature offers inherent system immunity against load transients and noise. this allows the slow-com- parator threshold to be set close to the maximum nor- mal operating level without experiencing nuisancefaults. to adjust the slow-comparator threshold, calcu- late r lim as follows: where v th is the desired slow-comparator threshold voltage. shorting lim_ to gnd sets v th to 25mv. do not leave lim_ open. setting the startup period, r tim the startup period (t start ) is adjustable from 0.4ms to 50ms. the adjustable startup period feature allows sys-tems to be customized for mosfet gate capacitance and board capacitance (c board ). the startup period is adjusted with a resistor connected from tim to gnd(r tim ). r tim must be between 4k ? and 500k ? . the startup period has a default value of 9ms when tim isleft floating. calculate r tim with the following equation: where t start is the desired startup period. r t pf tim start = 128 800 r vm v a lim th = ? 25 75 . low-voltage, quad, hot-swap controllers/power sequencers 18 ______________________________________________________________________________________ part number manufacturer description irf7413 11m , 8-pin so, 30v irf7401 22m , 8-pin so, 20v irl3502s international rectifier 6m , d 2 pak, 20v mmsf3300 20m , 8-pin so, 30v mmsf5n02h 30m , 8-pin so, 20v mtb60n05h motorola 14m , d 2 pak, 50v fds6670a 10m , 8-pin so, 30v nd8426a 13.5m , 8-pin so, 20v fdb8030l fairchild 4.5m , d 2 pak, 30v table 6. recommended n-channel mosfets component manufacturer phone website dale-vishay 402-562-3131 www.vishay.com sense resistors irc 704-264-8861 www.irctt.com international rectifier 310-233-3331 www.irf.com fairchild 888-522-5372 www.fairchildsemi.com mosfets motorola 602-224-3576 www.mot-sps.com/ppd table 7. component manufacturers downloaded from: http:///
startup sequence there are two ways of completing the startupsequence. case a describes a startup sequence that slowly turns on the mosfets by limiting the gatecharge. case b uses the current-limiting feature and turns on the mosfets as fast as possible while stillpreventing a high inrush current. the output voltage ramp-up time (t on ) is determined by the longer of the two timings, case a and case b. set the startup timer(t start ) to be longer than t on to guarantee enough time for the output voltage to settle.case a: slow turn-on (without current limit) there are two ways to turn on the mosfets without reaching the fast-comparator current limit: ? if the board capacitance (c board ) is small, the inrush current is low. ? if the gate capacitance is high, the mosfets turnon slowly. in both cases, the turn-on time is determined only bythe charge required to enhance the mosfet. the small 100a gate-charging current effectively limits the output voltage dv/dt. connecting an external capacitor between gate and gnd extends the turn- on time. the time required to charge/discharge a mosfet is as follows: where: c gate is the external gate to ground capacitance (figure 9), ? v gate is the change in gate charge, q gate is the mosfet total gate charge, i gate is the gate-charging/discharging current. in this case, the inrush current depends on the mosfetgate-to-drain capacitance (c rss ) plus any additional capacitance from gate to gnd (c gate ), and on any load current (i load ) present during the startup period. example: charging and discharging times using thefairchild fdb7030l mosfet if v in1 = 5v then gate1 charges up to 10.4v (v in1 + v drive ), therefore ? v gate = 10.4v. the manufacturers data sheet specifies that the fdb7030l has approxi- mately 60nc of gate charge and c rss = 600pf. the max5927/max5929 have a 100a gate-charging cur- rent and a 3ma/50ma normal/strong discharging cur- rent. c board = 6f and the load does not draw any current during the startup period. with no gate capaci- tor, the inrush current, charge, and discharge times are: i f pf aa i vn c a ms t vn c ma ms t vn c ma s inrush charge discharge discharge strong = + + = = + = = + = = + = 6 600 0 100 0 1 0104 60 100 06 0104 60 3 002 0104 60 50 12 . . . . . . () i c cc ii inrush board rss gate gate load = + + t cvq i gate gate gate gate = + ? max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________ 19 figure 10. adjustable undervoltage lockout gate_ sense_ v turn-on - (r 2 x r 1 ) v on , th r 2 on_ v in in_ r 1 r 2 max5927max5929 figure 9. operating with an external gate capacitor gate_ sense_ gnd on_ r sense_ v out_ c gate c board v in_ in_ r pullup s tat_ max5927max5929 downloaded from: http:///
max5927/max5929 with a 22nf gate capacitor, the inrush current, charge,and discharge times are: case b: fast turn-on (with current limit)in applications where the board capacitance (c board ) is high, the inrush current causes a voltage drop acrossr sense that exceeds the startup fast-comparator threshold. the fast comparator regulates the voltageacross the sense resistor to v fc,th . this effectively reg- ulates the inrush current during startup. in this case,the current charging c board can be considered con- stant and the turn-on time is: t cv r v on board in sense fc th = , i f pf nf am a t nf v nc a ms t nf v nc ma ms t nf v nc ma s inrush charge discharge discharge strong = + + = = + = = + = = + = 6 600 22 100 0 26 5 22 10 4 60 100 289 22 10 4 60 3 0 096 22 10 4 60 50 58 . . . . . . . () low-voltage, quad, hot-swap controllers/power sequencers 20 ______________________________________________________________________________________ iny gatey inz gatez q1 r sensey sensey r sensez sensez q2 c boardz outy c boardy outz v y c 1 r 1 v en v z on off gnd max5927max5929 ongnd v ony, th v onz, th t delay v en t 1 = -r 1 c 1 ln ( ) v en - v ony, th v en v on v y v z t 0 t 1 t 2 t 2 = -r 1 c 1 ln ( ) v en - v onz, th v en t delay = -r 1 c 1 ln ( ) v en - v ony, th v en - v onz, th figure 11. power sequencing: channel z turns on t delay after channel y downloaded from: http:///
the maximum inrush current in this case is:figure 6 shows the waveforms and timing diagrams for a startup transient with current regulation (see the typical operating characteristics ). when operating under this condition, an external gate capacitor isnot required. on comparators the on comparators control the on/off function of themax5927/max5929. on_ is also used to reset the fault latch (latch mode). pull v on_ low for 100s, t unlatch , to reset the shutdown latch. on_ also programs theuvlo threshold (see figure 10). a resistive-divider between v in_ , v on_ , and gnd sets the user program- mable turn-on voltage. in power-sequencing mode, anrc circuit can be used at on_ to set the delay timing (see figure 11). using the max5927/max5929 on the backplane using the max5927/max5929 on the backplane allowsmultiple cards with different input capacitance to be inserted into the same slot even if the card does not have on-board hot-swap protection. the startup period can be triggered if in_ is connected to on_ through a trace on the card (figure 12). input transients the voltage at in1, in2, in3, or in4 must be above v uvlo during inrush and fault conditions. when a short-circuitcondition occurs on the board, the fast comparator trips cause the external mosfet gates to be discharged at 50ma according to the mode of operation (see the mode section). the main system power supply must be able tosustain a temporary fault current, without dropping below the uvlo threshold of 2.45v, until the external mosfet is completely off. if the main system power supply collapses below uvlo, the max5927/max5929 force the device to restart once the supply has recovered. the mosfet is turned off in a very short time resulting in a high di/dt. the backplane delivering the power to the external card must have low inductance to minimize voltage transients caused by this high di/dt. mosfet thermal considerations during normal operation, the external mosfets dissi- pate little power. the mosfet r ds(on) is low when the mosfet is fully enhanced. the power dissipated in nor- mal operation is p d = i load 2 x r ds(on) . the most power dissipation occurs during the turn-on and turn-offtransients when the mosfets are in their linear regions. take into consideration the worst-case scenario of a continuous short-circuit fault, consider these two cases: 1) the single turn-on with the device latched after afault: max5927 (latch = high or floating) or max5929l. 2) the continuous autoretry after a fault: (max5927(latch = low) or max5929a. mosfet manufacturers typically include the packagethermal resistance from junction to ambient (r ja ) and thermal resistance from junction to case (r jc ), which determines the startup time and the retry duty cycle (d= t start /(t start + t retry ). calculate the required tran- sient thermal resistance with the following equation:where i start = v su,th /r sense . z tt vi ja max jmax a in start () ? i v r inrush fc th sense = , max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________ 21 figure 12. using the max5927/max5929 on a backplane on_ in_ gate_ v in v out sense_ max5927max5929 c board backplane power supply removable card with no hot-insertion protection downloaded from: http:///
max5927/max5929 layout considerations to take full tracking advantage of the switch responsetime to an output fault condition, it is important to keep all traces as short as possible and to maximize the high-cur- rent trace dimensions to reduce the effect of undesirable parasitic inductance. place the max5927/max5929 close to the cards connector. use a ground plane to minimize impedance and inductance. minimize the current-sense resistor trace length (<10mm), and ensure accurate cur- rent sensing with kelvin connections (figure 13). when the output is short circuited, the voltage drop across the external mosfet becomes large. hence, the power dissipation across the switch increases, as does the die temperature. an efficient way to achieve good power dissipation on a surface-mount package is to lay out two copper pads directly under the mosfet pack- age on both sides of the board. connect the two pads to the ground plane through vias, and use enlarged copper mounting pads on the topside of the board. low-voltage, quad, hot-swap controllers/power sequencers 22 ______________________________________________________________________________________ max5927max5929 gnd q4 q3 q2 q1 v 1 on1on2 on3 on4 gnd on1 out1out2 *max5927 only. **optional component. out3out4 1nf16v s tat1 s tat2 s tat3 s tat4 lim4* bias tim mode pol* latch* lim3*lim2* lim1* in4in3 in2 in1 sense4sense3 sense2 sense1 gate1 gate2 gate3 gate4 on2on3 on4 removable card backplane v 2 v 3 v 4 r sense1 r sense2 r sense3 r sense4 r lim1 ** r lim2 ** r lim3 ** r lim4 ** r lim ** t ypical operating circuit figure 13. kelvin connection for the current-sense resistors sense resistor high-current path max5927max5929 downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers ______________________________________________________________________________________ 23 2423 22 21 20 19 18 17 12 3 4 5 6 7 8 on3on4 in2 sense2 in1 on1 on2 mode top view gate2in3 sense3 gate3 sense4 in4 gate1 sense1 1615 14 13 9 1011 12 gndbias stat4 stat3 tim stat2 stat1 gate4 qsop max5929 pin configurations (continued) selector guide part current limit fault management stat_ polarity max5927etj programmable selectable selectable max5929lheeg fixed latched asserted high (open drain) max5929lleeg fixed latched asserted low max5929aheeg fixed autoretry asserted high (open drain) max5929aleeg fixed autoretry asserted low chip information transistor count: 7704process: bicmos downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers 24 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) qfn thin.eps d2 (nd-1) x e e d c pin # 1 i.d. (ne-1) x e e/2 e 0.08 c 0.10 c a a1 a3 detail a 0.15 c b 0.15 c a e2/2 e2 0.10 m c a b pin # 1 i.d. b 0.35x45 l d/2 d2/2 l c l c e e l c c l k k l l e 1 2 21-0140 package outline16, 20, 28, 32, 40l, thin qfn, 5x5x0.8mm detail b l l1 e common dimensions 3.35 3.15 t2855-1 3.25 3.35 3.15 3.25 max. 3.20 exposed pad variations 3.00 t2055-2 3.10 d2 nom. min. 3.20 3.00 3.10 min. e2 nom. max. ne nd pkg. codes 1. dimensioning & tolerancing conform to asme y14.5m-1994.2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e side respectively.7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals. 9. drawing conforms to jedec mo220, except exposed pad dimension for t2855-1, t2855-3 and t2855-6. notes: symbol pkg. n l1 e e d b a3 a a1 k 10. warpage shall not exceed 0.10 mm. jedec t1655-1 3.20 3.00 3.10 3.00 3.10 3.20 0.70 0.80 0.75 4.904.90 0.250.25 0 -- 4 whhb 4 16 0.35 0.30 5.105.10 5.00 0.80 bsc. 5.00 0.05 0.20 ref. 0.02 min. max. nom. 16l 5x5 3.10 t3255-2 3.00 3.20 3.00 3.10 3.20 2.70 t2855-2 2.60 2.60 2.80 2.70 2.80 e 2 2 21-0140 package outline16, 20, 28, 32, 40l, thin qfn, 5x5x0.8mm l 0.30 0.50 0.40 -- - -- - whhc 20 5 5 5.00 5.00 0.300.55 0.65 bsc. 0.45 0.25 4.904.90 0.25 0.65 -- 5.105.10 0.35 20l 5x5 0.20 ref. 0.750.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-1 28 7 7 5.00 5.00 0.250.55 0.50 bsc. 0.45 0.25 4.904.90 0.20 0.65 -- 5.105.10 0.30 28l 5x5 0.20 ref. 0.750.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-2 32 8 8 5.00 5.000.40 0.50 bsc. 0.30 0.25 4.904.90 0.50 -- 5.105.10 32l 5x5 0.20 ref. 0.750.02 nom. 0 0.70 min. 0.05 0.80 max. - 4010 10 5.00 5.00 0.200.50 0.40 bsc. 0.40 0.25 4.904.90 0.15 0.60 5.105.10 0.25 40l 5x5 0.20 ref. 0.75 nom. 0 0.70 min. 0.05 0.80 max. 0.20 0.25 0.30 - 0.35 0.45 0.30 0.40 0.50 down bonds allowed no yes 3.10 3.00 3.20 3.10 3.00 3.20 t2055-3 3.10 3.00 3.20 3.10 3.00 3.20 t2055-4 t2855-3 3.15 3.25 3.35 3.15 3.25 3.35 t2855-6 3.15 3.25 3.35 3.15 3.25 3.35 t2855-4 2.60 2.70 2.80 2.60 2.70 2.80 t2855-5 2.60 2.70 2.80 2.60 2.70 2.80 t2855-7 2.60 2.70 2.80 2.60 2.70 2.80 3.20 3.00 3.10 t3255-3 3.20 3.00 3.10 3.20 3.00 3.10 t3255-4 3.20 3.00 3.10 3.40 3.20 3.30 t4055-1 3.20 3.30 3.40 nono no no nono no no yesyes yes yes yes 3.20 3.00 t1655-2 3.10 3.00 3.10 3.20 yes downloaded from: http:///
max5927/max5929 low-voltage, quad, hot-swap controllers/power sequencers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 25 ? 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) qsop.eps e 1 1 21-0055 package outline, qsop .150", .025" lead pitch downloaded from: http:///

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